127 lines
6.4 KiB
C
127 lines
6.4 KiB
C
/*
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* =======================================================================================
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*
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* Author: Jan Eitzinger (je), jan.eitzinger@fau.de
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* Copyright (c) 2020 RRZE, University Erlangen-Nuremberg
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*
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* This file is part of MD-Bench.
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*
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* MD-Bench is free software: you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* MD-Bench is distributed in the hope that it will be useful, but WITHOUT ANY
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* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
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* PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
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* details.
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*
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* You should have received a copy of the GNU Lesser General Public License along
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* with MD-Bench. If not, see <https://www.gnu.org/licenses/>.
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* =======================================================================================
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*/
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#include <immintrin.h>
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#ifndef NO_ZMM_INTRIN
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# include <zmmintrin.h>
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#endif
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#define MD_SIMD_FLOAT __m512d
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#define MD_SIMD_MASK __mmask8
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#define MD_SIMD_INT __m256i
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static inline MD_SIMD_FLOAT simd_broadcast(MD_FLOAT scalar) { return _mm512_set1_pd(scalar); }
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static inline MD_SIMD_FLOAT simd_zero() { return _mm512_set1_pd(0.0); }
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static inline MD_SIMD_FLOAT simd_add(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm512_add_pd(a, b); }
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static inline MD_SIMD_FLOAT simd_sub(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm512_sub_pd(a, b); }
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static inline MD_SIMD_FLOAT simd_mul(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm512_mul_pd(a, b); }
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static inline MD_SIMD_FLOAT simd_fma(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b, MD_SIMD_FLOAT c) { return _mm512_fmadd_pd(a, b, c); }
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static inline MD_SIMD_FLOAT simd_reciprocal(MD_SIMD_FLOAT a) { return _mm512_rcp14_pd(a); }
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static inline MD_SIMD_FLOAT simd_masked_add(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b, MD_SIMD_MASK m) { return _mm512_mask_add_pd(a, m, a, b); }
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static inline MD_SIMD_MASK simd_mask_and(MD_SIMD_MASK a, MD_SIMD_MASK b) { return _kand_mask8(a, b); }
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static inline MD_SIMD_MASK simd_mask_cond_lt(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm512_cmp_pd_mask(a, b, _CMP_LT_OQ); }
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static inline MD_SIMD_MASK simd_mask_from_u32(unsigned int a) { return _cvtu32_mask8(a); }
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static inline unsigned int simd_mask_to_u32(MD_SIMD_MASK a) { return _cvtmask8_u32(a); }
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static inline MD_SIMD_FLOAT simd_load(MD_FLOAT *p) { return _mm512_load_pd(p); }
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static inline void simd_store(MD_FLOAT *p, MD_SIMD_FLOAT a) { _mm512_store_pd(p, a); }
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static inline MD_SIMD_FLOAT select_by_mask(MD_SIMD_FLOAT a, MD_SIMD_MASK m) { return _mm512_mask_mov_pd(_mm512_setzero_pd(), m, a); }
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static inline MD_FLOAT simd_h_reduce_sum(MD_SIMD_FLOAT a) {
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MD_SIMD_FLOAT x = _mm512_add_pd(a, _mm512_shuffle_f64x2(a, a, 0xee));
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x = _mm512_add_pd(x, _mm512_shuffle_f64x2(x, x, 0x11));
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x = _mm512_add_pd(x, _mm512_permute_pd(x, 0x01));
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return *((MD_FLOAT *) &x);
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}
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static inline MD_FLOAT simd_incr_reduced_sum(MD_FLOAT *m, MD_SIMD_FLOAT v0, MD_SIMD_FLOAT v1, MD_SIMD_FLOAT v2, MD_SIMD_FLOAT v3) {
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__m512d t0, t2;
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__m256d t3, t4;
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t0 = _mm512_add_pd(v0, _mm512_permute_pd(v0, 0x55));
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t2 = _mm512_add_pd(v2, _mm512_permute_pd(v2, 0x55));
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t0 = _mm512_mask_add_pd(t0, simd_mask_from_u32(0xaa), v1, _mm512_permute_pd(v1, 0x55));
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t2 = _mm512_mask_add_pd(t2, simd_mask_from_u32(0xaa), v3, _mm512_permute_pd(v3, 0x55));
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t0 = _mm512_add_pd(t0, _mm512_shuffle_f64x2(t0, t0, 0x4e));
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t0 = _mm512_mask_add_pd(t0, simd_mask_from_u32(0xF0), t2, _mm512_shuffle_f64x2(t2, t2, 0x4e));
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t0 = _mm512_add_pd(t0, _mm512_shuffle_f64x2(t0, t0, 0xb1));
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t0 = _mm512_mask_shuffle_f64x2(t0, simd_mask_from_u32(0x0C), t0, t0, 0xee);
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t3 = _mm512_castpd512_pd256(t0);
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t4 = _mm256_load_pd(m);
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t4 = _mm256_add_pd(t4, t3);
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_mm256_store_pd(m, t4);
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t0 = _mm512_add_pd(t0, _mm512_permutex_pd(t0, 0x4e));
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t0 = _mm512_add_pd(t0, _mm512_permutex_pd(t0, 0xb1));
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return _mm_cvtsd_f64(_mm512_castpd512_pd128(t0));
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}
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static inline MD_SIMD_FLOAT simd_load_h_duplicate(const MD_FLOAT *m) {
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return _mm512_broadcast_f64x4(_mm256_load_pd(m));
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}
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static inline MD_SIMD_FLOAT simd_load_h_dual(const MD_FLOAT *m) {
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return _mm512_insertf64x4(_mm512_broadcastsd_pd(_mm_load_sd(m)), _mm256_broadcastsd_pd(_mm_load_sd(m + 1)), 1);
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}
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static inline MD_FLOAT simd_h_dual_incr_reduced_sum(MD_FLOAT *m, MD_SIMD_FLOAT v0, MD_SIMD_FLOAT v1) {
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__m512d t0;
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__m256d t2, t3;
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t0 = _mm512_add_pd(v0, _mm512_permutex_pd(v0, 0x4e));
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t0 = _mm512_mask_add_pd(t0, simd_mask_from_u32(0xccul), v1, _mm512_permutex_pd(v1, 0x4e));
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t0 = _mm512_add_pd(t0, _mm512_permutex_pd(t0, 0xb1));
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t0 = _mm512_mask_shuffle_f64x2(t0, simd_mask_from_u32(0xaaul), t0, t0, 0xee);
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t2 = _mm512_castpd512_pd256(t0);
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t3 = _mm256_load_pd(m);
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t3 = _mm256_add_pd(t3, t2);
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_mm256_store_pd(m, t3);
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t0 = _mm512_add_pd(t0, _mm512_permutex_pd(t0, 0x4e));
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t0 = _mm512_add_pd(t0, _mm512_permutex_pd(t0, 0xb1));
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return _mm_cvtsd_f64(_mm512_castpd512_pd128(t0));
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}
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inline void simd_h_decr(MD_FLOAT *m, MD_SIMD_FLOAT a) {
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__m256d t;
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a = _mm512_add_pd(a, _mm512_shuffle_f64x2(a, a, 0xee));
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t = _mm256_load_pd(m);
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t = _mm256_sub_pd(t, _mm512_castpd512_pd256(a));
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_mm256_store_pd(m, t);
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}
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static inline void simd_h_decr3(MD_FLOAT *m, MD_SIMD_FLOAT a0, MD_SIMD_FLOAT a1, MD_SIMD_FLOAT a2) {
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simd_h_decr(m, a0);
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simd_h_decr(m + CLUSTER_N, a1);
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simd_h_decr(m + CLUSTER_N * 2, a2);
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}
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// Functions used in LAMMPS kernel
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static inline MD_SIMD_FLOAT simd_gather(MD_SIMD_INT vidx, const MD_FLOAT *m, int s) { return _mm512_i32gather_pd(vidx, m, s); }
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static inline MD_SIMD_INT simd_int_broadcast(int scalar) { return _mm256_set1_epi32(scalar); }
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static inline MD_SIMD_INT simd_int_zero() { return _mm256_setzero_si256(); }
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static inline MD_SIMD_INT simd_int_seq() { return _mm256_set_epi32(7, 6, 5, 4, 3, 2, 1, 0); }
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static inline MD_SIMD_INT simd_int_load(const int *m) { return _mm256_load_epi32(m); }
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static inline MD_SIMD_INT simd_int_add(MD_SIMD_INT a, MD_SIMD_INT b) { return _mm256_add_epi32(a, b); }
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static inline MD_SIMD_INT simd_int_mul(MD_SIMD_INT a, MD_SIMD_INT b) { return _mm256_mul_epi32(a, b); }
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static inline MD_SIMD_INT simd_int_mask_load(const int *m, MD_SIMD_MASK k) { return _mm256_mask_load_epi32(simd_int_zero(), k, m); }
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static inline MD_SIMD_MASK simd_mask_int_cond_lt(MD_SIMD_INT a, MD_SIMD_INT b) { return _mm256_cmp_epi32_mask(a, b, _MM_CMPINT_LT); }
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