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MD-Bench/static_analysis/rafael/analyses/gromacs-icx-avx512-sp-uica-clx.out
Rafael Ravedutti 17e239ed6d Add uiCA reference to its analyses 
Signed-off-by: Rafael Ravedutti <rafael.r.ravedutti@fau.de>
2023-04-05 23:58:52 +02:00

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Throughput (in cycles per iteration): 20.44
Bottleneck: Ports
The following throughputs could be achieved if the given property were the only bottleneck:
- LSD: 13.00
- Issue: 12.75
- Ports: 21.00
- Dependencies: 4.00
M - Macro-fused with previous instruction
┌───────────────────────┬────────┬───────┬───────────────────────────────────────────────────────────────────────┬───────┐
│ MITE MS DSB LSD │ Issued │ Exec. │ Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 │ Notes │
├───────────────────────┼────────┼───────┼───────────────────────────────────────────────────────────────────────┼───────┤
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/MOVSXD_R64_M32.htmlmovsxd rdi, dword ptr [rsi+rdx*4]]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/LEA_B_IS_R64.htmllea rdi, ptr [rdi+rdi*2]]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/SHL_R64_I8.htmlshl rdi, 0x5]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMOVUPD_ZMM_M512.htmlvmovupd zmm16, zmmword ptr [rcx+rdi*1]]8;;
│ 2 │ 2 │ 2 │ 1 1 │ │ ]8;;https://www.uops.info/html-instr/VINSERTF64X4_ZMM_ZMM_M256_I8.htmlvinsertf64x4 zmm17, zmm16, ymmword ptr [rcx+rdi*1], 0x1]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VBROADCASTF64X4_ZMM_M256.htmlvbroadcastf64x4 zmm18, ymmword ptr [rcx+rdi*1+0x40]]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VSHUFF64X2_ZMM_ZMM_ZMM_I8.htmlvshuff64x2 zmm16, zmm16, zmm16, 0xee]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VSUBPS_ZMM_ZMM_ZMM.htmlvsubps zmm19, zmm6, zmm17]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VSUBPS_ZMM_ZMM_ZMM.htmlvsubps zmm20, zmm10, zmm16]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VSUBPS_ZMM_ZMM_ZMM.htmlvsubps zmm21, zmm12, zmm18]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VSUBPS_ZMM_ZMM_ZMM.htmlvsubps zmm17, zmm9, zmm17]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VSUBPS_ZMM_ZMM_ZMM.htmlvsubps zmm18, zmm14, zmm18]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VSUBPS_ZMM_ZMM_ZMM.htmlvsubps zmm16, zmm11, zmm16]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm22, zmm21, zmm21]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_ZMM_ZMM.htmlvfmadd231ps zmm22, zmm20, zmm20]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_ZMM_ZMM.htmlvfmadd231ps zmm22, zmm19, zmm19]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm23, zmm18, zmm18]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_ZMM_ZMM.htmlvfmadd231ps zmm23, zmm16, zmm16]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_ZMM_ZMM.htmlvfmadd231ps zmm23, zmm17, zmm17]8;;
│ 3 │ 3 │ 3 │ 2 1 │ │ ]8;;https://www.uops.info/html-instr/VRCP14PS_ZMM_ZMM.htmlvrcp14ps zmm24, zmm22]8;;
│ 3 │ 3 │ 3 │ 2 1 │ │ ]8;;https://www.uops.info/html-instr/VRCP14PS_ZMM_ZMM.htmlvrcp14ps zmm25, zmm23]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VCMPPS_K_ZMM_ZMM_I8.htmlvcmpps k2, zmm22, zmm0, 0x1]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VCMPPS_K_ZMM_ZMM_I8.htmlvcmpps k1, zmm23, zmm0, 0x1]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm22, zmm24, zmm29]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm23, zmm24, zmm24]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm26, zmm25, zmm29]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm22, zmm23, zmm22]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm23, zmm25, zmm25]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm23, zmm23, zmm26]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VADDPS_ZMM_ZMM_ZMM.htmlvaddps zmm26, zmm22, zmm2]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm24, zmm1, zmm24]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm22, zmm24, zmm22]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm22, zmm22, zmm26]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VADDPS_ZMM_ZMM_ZMM.htmlvaddps zmm24, zmm23, zmm2]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm25, zmm1, zmm25]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm23, zmm25, zmm23]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VMULPS_ZMM_ZMM_ZMM.htmlvmulps zmm23, zmm23, zmm24]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_K_ZMM_ZMM.htmlvfmadd231ps zmm13{k2}, zmm22, zmm19]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_K_ZMM_ZMM.htmlvfmadd231ps zmm8{k2}, zmm22, zmm20]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_K_ZMM_ZMM.htmlvfmadd231ps zmm5{k2}, zmm22, zmm21]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_K_ZMM_ZMM.htmlvfmadd231ps zmm15{k1}, zmm23, zmm17]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_K_ZMM_ZMM.htmlvfmadd231ps zmm7{k1}, zmm23, zmm16]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/VFMADD231PS_ZMM_K_ZMM_ZMM.htmlvfmadd231ps zmm4{k1}, zmm23, zmm18]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/INC_R64.htmlinc rdx]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/CMP_39_R64_R64.htmlcmp r12, rdx]8;;
│ │ │ │ │ M │ ]8;;https://www.uops.info/html-instr/JNZ_Rel32.htmljnz <computeForceLJ_4xn+0xffffffffffffdc36>]8;;
│ 1 │ 1 │ 1 │ 1 │ │ ]8;;https://www.uops.info/html-instr/JMP_Rel32.htmljmp <computeForceLJ_4xn+0xffffffffffffd898>]8;;
├───────────────────────┼────────┼───────┼───────────────────────────────────────────────────────────────────────┼───────┤
│ 51 │ 51 │ 51 │ 21 1 2 2 21 4 │ │ Total
└───────────────────────┴────────┴───────┴───────────────────────────────────────────────────────────────────────┴───────┘
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