moebiusband/MD-Bench
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36 Commits

Author SHA1 Message Date
Rafael Ravedutti
f467d10ed3 Add cleanall command for all TAG and OPT_SCHEME variants 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2023-01-02 19:11:05 +01:00
Rafael Ravedutti
efa462d0af Add AVX_FMA ISA 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-11-15 01:24:30 +01:00
Rafael Ravedutti
cd1fbfb3c8 Reorganize SIMD files and split AVX and AVX2 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-11-15 00:55:46 +01:00
Rafael Ravedutti
493915fe95 Fix code for AVX and remove warnings 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-11-08 15:30:37 +01:00
Rafael Ravedutti
47db9e86b0 Introduce common directory 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-08-17 17:20:57 +02:00
Rafael Ravedutti
911ba63336 Adjust ISA options and improve output 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-08-16 18:36:47 +02:00
Rafael Ravedutti
c18124b066 Integrate LAMMPS CUDA versions into master branch 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-08-09 18:53:53 +02:00
Rafael Ravedutti
ab2eb1ff50 Write LAMMPS kernel with SIMD intrinsics and implement AVX512 with double-precision functions 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-04-05 02:57:23 +02:00
Rafael Ravedutti
4d11c5a3c2 Merge branch 'master' of github.com:RRZE-HPC/MD-Bench 2022-04-04 21:52:47 +02:00
Rafael Ravedutti
e48b3fb653 Add option to check if cj is local before applying reaction force 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-04-04 21:52:40 +02:00
Jan Eitzinger
5585ebcf42 Add ONEAPI config. Remove omp simd for full neigh. 2022-04-01 15:57:54 +02:00
Rafael Ravedutti
d61576699d Add first compilable version of Gromacs with SP 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-03-15 02:40:56 +01:00
Rafael Ravedutti
c7360305c8 Add first draft version of GROMACS method separating i-clusters and j-clusters 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-03-09 02:25:39 +01:00
Rafael Ravedutti
af92800c64 Add SIMD version with AVX (no AVX2) and XTC output 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-03-02 23:12:04 +01:00
Rafael Ravedutti
ed2929c813 Add percentage of atoms within cutoff radius when using LAMMPS reference version 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-02-25 14:40:33 +01:00
Rafael Ravedutti
9daf9e5f4d Fix exclusion masks and add SIMD debug tools 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-02-02 21:54:18 +01:00
Rafael Ravedutti
6ad1e58a3e Add first kernel using SIMD instrinsics for 4xn cases 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-02-02 18:00:44 +01:00
Rafael Ravedutti
72730bc27b Update Makefile and config.mk 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2022-01-17 14:16:39 +01:00
Rafael Ravedutti
43ba28e130 Add ATOMS_LOOP_RUNS option and statistics to stub variant 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-10-12 22:39:54 +02:00
Rafael Ravedutti
55d346510e Compute statistics, useful data volume and cycles per SIMD iteration 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-10-12 15:04:08 +02:00
Rafael Ravedutti
6b75c158d6 Include atom reference on index tracer and add only_mem ASM version 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-08-10 01:19:26 +02:00
Rafael Ravedutti
9d79f0248f Add config option to switch between asm syntaxes 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-08-09 21:37:18 +02:00
Rafael Ravedutti
d97fc577b0 Add first version of index and distance tracer 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-07-09 23:49:14 +02:00
Rafael Ravedutti
0a2ec6376c Add memory tracer and update config.mk with all options 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-06-16 00:56:00 +02:00
Jan Eitzinger
b6d4753c2a Add LIKWID Option. Allow to overwrite with asm variant. 2021-06-11 09:38:34 +02:00
Rafael Ravedutti
0482e4f09a Avoid resize messages on run_stub output and build objects from assembly files 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-05-22 03:26:56 +02:00
Rafael Ravedutti
56ad09156b Fix explicit types for stubbed version 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-05-20 00:08:10 +02:00
Rafael Ravedutti
15de65303e Add version iterating most internal loop multiple times 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-05-05 03:04:41 +02:00
Jan Eitzinger
06ba3b2726 Restructure timing and instrumentation. Add performance metric. 2021-04-15 14:55:02 +02:00
Jan Eitzinger
35273c491b Introduce generic variant targets 
Change Makefiles to allow multiple binary targets specified by VARIANT
environment variabel. For specified variants a matching main-<VARIANT>.c
source file must be present.
 2021-04-12 08:24:27 +02:00
Rafael Ravedutti
7efd30791a Add version with stubbed force calculation 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-03-30 01:54:56 +02:00
Jan Eitzinger
d026028439 Streamline build system 2021-03-24 08:43:44 +01:00
Jan Eitzinger
fc1fc9fd45 Port pbc to new macros. Enable debugging flags. 2021-03-23 10:03:55 +01:00
Jan Eitzinger
6679b6c8aa Simplify macros for data structure access. 
Still segvaults for AoS.
 2021-03-23 09:26:41 +01:00
Rafael Ravedutti
3f7edb5dbf Add support for AoS data layout 
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
 2021-03-20 18:32:50 +01:00
Jan Eitzinger
ff45b07749 Initial checkin of simplified miniMD port. Does not work yet. 2020-08-11 16:34:22 +02:00