Add AVX_FMA ISA
Signed-off-by: Rafael Ravedutti <rafaelravedutti@gmail.com>
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4
Makefile
4
Makefile
@ -77,6 +77,10 @@ ifeq ($(strip $(__ISA_AVX__)),true)
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DEFINES += -D__ISA_AVX__
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endif
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ifeq ($(strip $(__ISA_AVX_FMA__)),true)
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DEFINES += -D__ISA_AVX_FMA__
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endif
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ifeq ($(strip $(__ISA_AVX2__)),true)
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DEFINES += -D__ISA_AVX2__
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endif
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@ -61,7 +61,11 @@ static inline MD_FLOAT simd_incr_reduced_sum(MD_FLOAT *m, MD_SIMD_FLOAT v0, MD_S
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static inline MD_SIMD_FLOAT select_by_mask(MD_SIMD_FLOAT a, MD_SIMD_MASK m) { return _mm256_and_pd(a, m); }
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static inline MD_SIMD_FLOAT simd_reciprocal(MD_SIMD_FLOAT a) { return _mm256_cvtps_pd(_mm_rcp_ps(_mm256_cvtpd_ps(a))); }
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#ifdef __ISA_AVX_FMA__
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static inline MD_SIMD_FLOAT simd_fma(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b, MD_SIMD_FLOAT c) { return _mm256_fmadd_pd(a, b, c); }
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#else
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static inline MD_SIMD_FLOAT simd_fma(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b, MD_SIMD_FLOAT c) { return simd_add(simd_mul(a, b), c); }
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#endif
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static inline MD_SIMD_FLOAT simd_masked_add(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b, MD_SIMD_MASK m) { return simd_add(a, _mm256_and_pd(b, m)); }
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static inline MD_SIMD_MASK simd_mask_cond_lt(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm256_cmp_pd(a, b, _CMP_LT_OQ); }
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static inline MD_SIMD_MASK simd_mask_int_cond_lt(MD_SIMD_INT a, MD_SIMD_INT b) { return _mm256_cvtepi32_pd(_mm_cmplt_epi32(a, b)); }
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@ -1,6 +1,6 @@
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# Compiler tag (GCC/CLANG/ICC/ONEAPI/NVCC)
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TAG ?= ICC
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# Instruction set (SSE/AVX/AVX2/AVX512)
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# Instruction set (SSE/AVX/AVX_FMA/AVX2/AVX512)
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ISA ?= AVX512
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# Optimization scheme (lammps/gromacs/clusters_per_bin)
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OPT_SCHEME ?= lammps
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@ -4,6 +4,10 @@ ifeq ($(strip $(ISA)), SSE)
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else ifeq ($(strip $(ISA)), AVX)
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__ISA_AVX__=true
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__SIMD_WIDTH_DBL__=4
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else ifeq ($(strip $(ISA)), AVX_FMA)
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__ISA_AVX__=true
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__ISA_AVX_FMA__=true
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__SIMD_WIDTH_DBL__=4
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else ifeq ($(strip $(ISA)), AVX2)
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__ISA_AVX2__=true
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#__SIMD_KERNEL__=true
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