66 lines
2.9 KiB
C
66 lines
2.9 KiB
C
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/*
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* =======================================================================================
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*
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* Author: Jan Eitzinger (je), jan.eitzinger@fau.de
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* Copyright (c) 2020 RRZE, University Erlangen-Nuremberg
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*
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* This file is part of MD-Bench.
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*
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* MD-Bench is free software: you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* MD-Bench is distributed in the hope that it will be useful, but WITHOUT ANY
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* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
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* PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
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* details.
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*
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* You should have received a copy of the GNU Lesser General Public License along
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* with MD-Bench. If not, see <https://www.gnu.org/licenses/>.
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* =======================================================================================
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <immintrin.h>
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#include <zmmintrin.h>
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#define MD_SIMD_FLOAT __m256
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#ifdef NO_AVX2
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#define MD_SIMD_MASK __m256
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#else
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#define MD_SIMD_MASK __mmask8
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#endif
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static inline MD_SIMD_FLOAT simd_broadcast(float scalar) { return _mm256_set1_ps(scalar); }
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static inline MD_SIMD_FLOAT simd_zero() { return _mm256_set1_ps(0.0); }
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static inline MD_SIMD_FLOAT simd_add(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm256_add_ps(a, b); }
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static inline MD_SIMD_FLOAT simd_sub(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm256_sub_ps(a, b); }
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static inline MD_SIMD_FLOAT simd_mul(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm256_mul_ps(a, b); }
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static inline MD_SIMD_FLOAT simd_load(MD_FLOAT *p) { return _mm256_load_ps(p); }
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#ifdef NO_AVX2
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#error "AVX intrinsincs with single-precision not implemented!"
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#else // AVX2
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static inline MD_SIMD_FLOAT simd_reciprocal(MD_SIMD_FLOAT a) { return _mm256_rcp14_ps(a); }
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static inline MD_SIMD_FLOAT simd_fma(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b, MD_SIMD_FLOAT c) { return _mm256_fmadd_ps(a, b, c); }
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static inline MD_SIMD_FLOAT simd_masked_add(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b, MD_SIMD_MASK m) { return _mm256_mask_add_ps(a, m, a, b); }
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static inline MD_SIMD_MASK simd_mask_cond_lt(MD_SIMD_FLOAT a, MD_SIMD_FLOAT b) { return _mm256_cmp_pd_mask(a, b, _CMP_LT_OQ); }
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static inline MD_SIMD_MASK simd_mask_and(MD_SIMD_MASK a, MD_SIMD_MASK b) { return _kand_mask8(a, b); }
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static inline MD_SIMD_MASK simd_mask_from_u32(unsigned int a) { return _cvtu32_mask8(a); }
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static inline unsigned int simd_mask_to_u32(MD_SIMD_MASK a) { return _cvtmask8_u32(a); }
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static inline MD_FLOAT simd_h_reduce_sum(MD_SIMD_FLOAT a) {
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__m128 t0;
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t0 = _mm_add_ps(_mm256_castps256_ps128(a), _mm256_extractf128_ps(a, 0x1));
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t0 = _mm_add_ps(t0, _mm_permute_ps(t0, _MM_SHUFFLE(1, 0, 3, 2)));
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t0 = _mm_add_ss(t0, _mm_permute_ps(t0, _MM_SHUFFLE(0, 3, 2, 1)));
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return *((MD_FLOAT *) &t0);
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}
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#endif
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