89 lines
8.0 KiB
Plaintext
89 lines
8.0 KiB
Plaintext
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Intel(R) Architecture Code Analyzer Version - v3.0-28-g1ba2cbb build date: 2017-10-23;16:42:45
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Analyzed File - lammps-icc-avx2.o
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Binary Format - 64Bit
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Architecture - SKX
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Analysis Type - Throughput
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Throughput Analysis Report
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--------------------------
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Block Throughput: 25.58 Cycles Throughput Bottleneck: Backend
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Loop Count: 22
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Port Binding In Cycles Per Iteration:
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--------------------------------------------------------------------------------------------------
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| Port | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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--------------------------------------------------------------------------------------------------
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| Cycles | 13.7 8.0 | 13.6 | 5.5 5.5 | 5.5 5.5 | 0.0 | 13.7 | 7.0 | 0.0 |
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--------------------------------------------------------------------------------------------------
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DV - Divider pipe (on port 0)
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D - Data fetch pipe (on ports 2 and 3)
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F - Macro Fusion with the previous instruction occurred
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* - instruction micro-ops not bound to a port
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^ - Micro Fusion occurred
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# - ESP Tracking sync uop was issued
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@ - SSE instruction followed an AVX256/AVX512 instruction, dozens of cycles penalty is expected
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X - instruction not supported, was not accounted in Analysis
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| Num Of | Ports pressure in cycles | |
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| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 |
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-----------------------------------------------------------------------------------------
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| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | vmovdqu xmm0, xmmword ptr [rbx+rdx*4]
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| 1 | 1.0 | | | | | | | | vmovq rcx, xmm0
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| 1 | | | | | | 1.0 | | | vpunpckhqdq xmm2, xmm0, xmm0
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| 1 | 1.0 | | | | | | | | vmovq r15, xmm2
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| 1* | | | | | | | | | mov r8d, ecx
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| 1 | | | | | | | 1.0 | | shr rcx, 0x20
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| 1 | | | | | | 1.0 | | | lea r14d, ptr [rcx+rcx*2]
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| 1 | | | | | | 1.0 | | | lea r8d, ptr [r8+r8*2]
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| 1 | | | | | | | 1.0 | | movsxd rcx, r8d
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| 1 | | | | | | | 1.0 | | movsxd r8, r14d
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| 1* | | | | | | | | | mov r14d, r15d
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| 1 | | | | | | | 1.0 | | shr r15, 0x20
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| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | vmovups xmm7, xmmword ptr [r11+rcx*8]
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| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | vmovups xmm6, xmmword ptr [r11+r8*8]
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| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | vmovq xmm14, qword ptr [r11+rcx*8+0x10]
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| 1 | | 0.3 | | | | 0.7 | | | lea r14d, ptr [r14+r14*2]
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| 1 | | | | | | | 1.0 | | movsxd r14, r14d
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| 1 | | 0.7 | | | | 0.3 | | | lea r15d, ptr [r15+r15*2]
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| 1 | | | | | | | 1.0 | | movsxd r15, r15d
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| 2 | | | 0.5 0.5 | 0.5 0.5 | | 1.0 | | | vmovhpd xmm15, xmm14, qword ptr [r11+r8*8+0x10]
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| 2 | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | vinsertf128 ymm1, ymm7, xmmword ptr [r11+r14*8], 0x1
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| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | vmovq xmm0, qword ptr [r11+r14*8+0x10]
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| 2 | | 0.3 | 0.5 0.5 | 0.5 0.5 | | 0.7 | | | vinsertf128 ymm6, ymm6, xmmword ptr [r11+r15*8], 0x1
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| 2 | | | 0.5 0.5 | 0.5 0.5 | | 1.0 | | | vmovhpd xmm2, xmm0, qword ptr [r11+r15*8+0x10]
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| 1 | | | | | | 1.0 | | | vunpcklpd ymm14, ymm1, ymm6
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| 1 | | | | | | 1.0 | | | vunpckhpd ymm1, ymm1, ymm6
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| 1 | 0.7 | 0.3 | | | | | | | vsubpd ymm6, ymm10, ymm14
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| 1 | | | | | | 1.0 | | | vinsertf128 ymm7, ymm15, xmm2, 0x1
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| 1 | 0.3 | 0.7 | | | | | | | vsubpd ymm2, ymm9, ymm1
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| 1 | 0.7 | 0.3 | | | | | | | vsubpd ymm0, ymm8, ymm7
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| 1 | 0.3 | 0.7 | | | | | | | vmulpd ymm14, ymm2, ymm2
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| 1 | 0.7 | 0.3 | | | | | | | vfmadd231pd ymm14, ymm6, ymm6
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| 1 | 0.3 | 0.7 | | | | | | | vfmadd231pd ymm14, ymm0, ymm0
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| 1 | 0.7 | 0.3 | | | | | | | vcmppd ymm1, ymm14, ymm5, 0x1
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| 1 | 0.3 | 0.7 | | | | | | | vpcmpeqd ymm7, ymm7, ymm7
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| 2 | 1.0 | | | | | 1.0 | | | vptest ymm1, ymm7
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| 1 | 1.0 8.0 | | | | | | | | vdivpd ymm7, ymm4, ymm14
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| 2^ | | 1.0 | 0.5 0.5 | 0.5 0.5 | | | | | vmulpd ymm14, ymm7, ymmword ptr [rsp+0x60]
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| 1 | | 1.0 | | | | | | | vmulpd ymm14, ymm7, ymm14
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| 1 | 0.7 | 0.3 | | | | | | | vmulpd ymm15, ymm7, ymm14
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| 1 | 0.3 | 0.7 | | | | | | | vfmsub213pd ymm14, ymm7, ymm3
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| 2^ | 0.7 | 0.3 | 0.5 0.5 | 0.5 0.5 | | | | | vmulpd ymm7, ymm7, ymmword ptr [rsp+0x40]
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| 1 | 0.3 | 0.7 | | | | | | | vmulpd ymm15, ymm15, ymm7
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| 1 | 0.7 | 0.3 | | | | | | | vmulpd ymm7, ymm15, ymm14
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| 1 | 0.3 | 0.7 | | | | | | | vmulpd ymm6, ymm6, ymm7
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| 1 | 0.7 | 0.3 | | | | | | | vmulpd ymm2, ymm2, ymm7
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| 1 | | | | | | 1.0 | | | vandpd ymm6, ymm1, ymm6
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| 1 | 0.3 | 0.7 | | | | | | | vaddpd ymm13, ymm13, ymm6
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| 1 | 0.7 | 0.3 | | | | | | | vmulpd ymm6, ymm0, ymm7
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| 1 | | | | | | 1.0 | | | vandpd ymm0, ymm1, ymm2
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| 1 | | | | | | 1.0 | | | vandpd ymm1, ymm1, ymm6
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| 1 | 0.3 | 0.7 | | | | | | | vaddpd ymm12, ymm12, ymm0
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| 1 | 0.7 | 0.3 | | | | | | | vaddpd ymm11, ymm11, ymm1
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| 1 | | | | | | | 1.0 | | add rdx, 0x4
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| 1* | | | | | | | | | cmp rdx, rsi
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| 0*F | | | | | | | | | jb 0xffffffffffffff02
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Total Num Of Uops: 62
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Analysis Notes:
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Backend allocation was stalled due to unavailable allocation resources.
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