mirror of
https://github.com/ClusterCockpit/cc-metric-collector.git
synced 2024-12-28 16:19:05 +01:00
33 lines
999 B
Plaintext
33 lines
999 B
Plaintext
SHORT L2 cache miss rate/ratio
|
|
|
|
EVENTSET
|
|
PMC0 INST_RETIRED
|
|
PMC1 CPU_CYCLES
|
|
PMC2 L2D_CACHE
|
|
PMC3 L2D_CACHE_REFILL
|
|
|
|
METRICS
|
|
Runtime (RDTSC) [s] time
|
|
Clock [MHz] 1.E-06*PMC1/time
|
|
CPI PMC1/PMC0
|
|
L2 request rate PMC2/PMC0
|
|
L2 miss rate PMC3/PMC0
|
|
L2 miss ratio PMC3/PMC2
|
|
|
|
LONG
|
|
Formulas:
|
|
L2 request rate = L2D_CACHE/INST_RETIRED
|
|
L2 miss rate = L2D_CACHE_REFILL/INST_RETIRED
|
|
L2 miss ratio = L2D_CACHE_REFILL/L2D_CACHE
|
|
-
|
|
This group measures the locality of your data accesses with regard to the
|
|
L2 cache. L2 request rate tells you how data intensive your code is
|
|
or how many data accesses you have on average per instruction.
|
|
The L2 miss rate gives a measure how often it was necessary to get
|
|
cache lines from memory. And finally L2 miss ratio tells you how many of your
|
|
memory references required a cache line to be loaded from a higher level.
|
|
While the data cache miss rate might be given by your algorithm you should
|
|
try to get data cache miss ratio as low as possible by increasing your cache reuse.
|
|
|
|
|