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24 lines
797 B
Plaintext
24 lines
797 B
Plaintext
SHORT L1 TLB misses
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EVENTSET
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PMC0 DATA_PAGE_WALK
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PMC1 DATA_READ_OR_WRITE
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METRICS
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Runtime (RDTSC) [s] time
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L1 TLB misses [misses/s] PMC0/time
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L1 TLB miss ratio PMC0/PMC1
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LONG
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Formulas:
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L1 TLB misses [misses/s] = DATA_PAGE_WALK/time
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L1 TLB miss ratio = DATA_PAGE_WALK/DATA_READ_OR_WRITE
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-
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This performance group measures the L1 TLB misses. A L1 TLB miss that hits the
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L2 TLB has a penelty of about 25 cycles for 4kB pages. For 2MB pages, the penelty
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for a L1 TLB miss that hits L2 TLB is about 8 cycles. The minimal L1 TLB miss ratio
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is about 1/64, so a high ratio indicates a bad spartial locality. Data of a page
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is only partly accessed. It can also indicate trashing because when multiple pages
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are accessed in a loop iteration, the size and associativity is not sufficient to
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hold all pages.
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