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35 lines
1.4 KiB
Plaintext
35 lines
1.4 KiB
Plaintext
SHORT False sharing
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EVENTSET
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FIXC0 INSTR_RETIRED_ANY
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FIXC1 CPU_CLK_UNHALTED_CORE
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FIXC2 CPU_CLK_UNHALTED_REF
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PMC0 MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HITM
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PMC1 MEM_LOAD_UOPS_L3_MISS_RETIRED_REMOTE_HITM
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PMC2 MEM_LOAD_UOPS_RETIRED_ALL_ALL
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METRICS
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Runtime (RDTSC) [s] time
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Runtime unhalted [s] FIXC1*inverseClock
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Clock [MHz] 1.E-06*(FIXC1/FIXC2)/inverseClock
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CPI FIXC1/FIXC0
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Local LLC hit with false sharing [MByte] 1.E-06*PMC0*64
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Local LLC hit with false sharing rate PMC0/PMC2
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Remote LLC false sharing [MByte] 1.E-06*PMC1*64
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Remote LLC false sharing rate PMC1/PMC2
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LONG
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Formulas:
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Local LLC false sharing [MByte] = 1.E-06*MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HITM*64
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Local LLC false sharing rate = MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HITM/MEM_LOAD_UOPS_RETIRED_ALL
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Remote LLC false sharing [MByte] = 1.E-06*MEM_LOAD_UOPS_L3_MISS_RETIRED_REMOTE_HITM*64
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Remote LLC false sharing rate = MEM_LOAD_UOPS_L3_MISS_RETIRED_REMOTE_HITM/MEM_LOAD_UOPS_RETIRED_ALL
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-
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False-sharing of cache lines can dramatically reduce the performance of an
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application. This performance group measures the L3 traffic induced by false-sharing.
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The false-sharing rate uses all memory loads as reference.
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For systems with multiple CPU sockets, this performance group also measures the
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false-sharing of cache lines over socket boundaries.
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Please keep in mind that the MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HITM event may
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undercount by as much as 40% (Errata HSW150).
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