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36 lines
1.4 KiB
Plaintext
36 lines
1.4 KiB
Plaintext
SHORT Main memory bandwidth in MBytes/s
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EVENTSET
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PMC0 NORTHBRIDGE_READ_RESPONSE_ALL
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PMC1 OCTWORDS_WRITE_TRANSFERS
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PMC2 DRAM_ACCESSES_DCTO_ALL
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PMC3 DRAM_ACCESSES_DCT1_ALL
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METRICS
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Runtime (RDTSC) [s] time
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Memory read bandwidth [MBytes/s] 1.0E-06*PMC0*64.0/time
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Memory read data volume [GBytes] 1.0E-09*PMC0*64.0
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Memory write bandwidth [MBytes/s] 1.0E-06*PMC1*8.0/time
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Memory write data volume [GBytes] 1.0E-09*PMC1*8.0
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Memory bandwidth [MBytes/s] 1.0E-06*(PMC2+PMC3)*64.0/time
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Memory data volume [GBytes] 1.0E-09*(PMC2+PMC3)*64.0
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LONG
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Formulas:
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Memory read bandwidth [MBytes/s] = 1.0E-06*NORTHBRIDGE_READ_RESPONSE_ALL*64/time
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Memory read data volume [GBytes] = 1.0E-09*NORTHBRIDGE_READ_RESPONSE_ALL*64
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Memory write bandwidth [MBytes/s] = 1.0E-06*OCTWORDS_WRITE_TRANSFERS*8/time
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Memory write data volume [GBytes] = 1.0E-09*OCTWORDS_WRITE_TRANSFERS*8
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Memory bandwidth [MBytes/s] = 1.0E-06*(DRAM_ACCESSES_DCTO_ALL+DRAM_ACCESSES_DCT1_ALL)*64/time
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Memory data volume [GBytes] = 1.0E-09*(DRAM_ACCESSES_DCTO_ALL+DRAM_ACCESSES_DCT1_ALL)*64
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-
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Profiling group to measure memory bandwidth drawn by all cores of a socket.
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Note: As this group measures the accesses from all cores it only makes sense
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to measure with one core per socket, similar as with the Intel Nehalem Uncore events.
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The memory read bandwidth contains all data from DRAM, L3, or another cache,
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including another core on the same node. The event OCTWORDS_WRITE_TRANSFERS counts
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16 Byte transfers, not 64 Byte.
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