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29 lines
1004 B
Plaintext
29 lines
1004 B
Plaintext
SHORT Packed AVX MFLOP/s
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EVENTSET
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FIXC0 INSTR_RETIRED_ANY
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FIXC1 CPU_CLK_UNHALTED_CORE
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FIXC2 CPU_CLK_UNHALTED_REF
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PMC0 AVX_INSTS_CALC
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METRICS
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Runtime (RDTSC) [s] time
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Runtime unhalted [s] FIXC1*inverseClock
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Clock [MHz] 1.E-06*(FIXC1/FIXC2)/inverseClock
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CPI FIXC1/FIXC0
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Packed SP [MFLOP/s] 1.0E-06*(PMC0*8.0)/time
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Packed DP [MFLOP/s] 1.0E-06*(PMC0*4.0)/time
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LONG
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Formulas:
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Packed SP [MFLOP/s] = 1.0E-06*(AVX_INSTS_CALC*8)/runtime
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Packed DP [MFLOP/s] = 1.0E-06*(AVX_INSTS_CALC*4)/runtime
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-
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Packed 32b AVX FLOP/s rates. Approximate counts of AVX & AVX2 256-bit instructions.
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May count non-AVX instructions that employ 256-bit operations, including (but
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not necessarily limited to) rep string instructions that use 256-bit loads and
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stores for optimized performance, XSAVE* and XRSTOR*, and operations that
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transition the x87 FPU data registers between x87 and MMX.
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Caution: The event AVX_INSTS_CALC counts the insertf128 instruction often used
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by the Intel C compilers for (unaligned) vector loads.
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