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24 lines
491 B
Plaintext
24 lines
491 B
Plaintext
SHORT Instruction cache miss rate/ratio
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EVENTSET
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PMC0 INST_RETIRED
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PMC1 CPU_CYCLES
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PMC2 L1I_CACHE
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PMC3 L1I_CACHE_REFILL
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METRICS
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Runtime (RDTSC) [s] time
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Clock [MHz] 1.E-06*PMC1/time
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CPI PMC1/PMC0
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L1I request rate PMC2/PMC0
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L1I miss rate PMC3/PMC0
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L1I miss ratio PMC3/PMC2
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LONG
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Formulas:
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L1I request rate = L1I_CACHE / INST_RETIRED
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L1I miss rate = L1I_CACHE_REFILL / INST_RETIRED
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L1I miss ratio = L1I_CACHE_REFILL / L1I_CACHE
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-
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This group measures some L1 instruction cache metrics.
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