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29 lines
752 B
Plaintext
29 lines
752 B
Plaintext
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SHORT Instruction cache miss rate/ratio
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EVENTSET
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FIXC1 ACTUAL_CPU_CLOCK
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FIXC2 MAX_CPU_CLOCK
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PMC0 RETIRED_INSTRUCTIONS
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PMC1 ICACHE_FETCHES
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PMC2 ICACHE_L2_REFILLS
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PMC3 ICACHE_SYSTEM_REFILLS
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METRICS
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Runtime (RDTSC) [s] time
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Runtime unhalted [s] FIXC1*inverseClock
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Clock [MHz] 1.E-06*(FIXC1/FIXC2)/inverseClock
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CPI FIXC1/PMC0
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L1I request rate PMC1/PMC0
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L1I miss rate (PMC2+PMC3)/PMC0
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L1I miss ratio (PMC2+PMC3)/PMC1
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LONG
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Formulas:
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L1I request rate = ICACHE_FETCHES / RETIRED_INSTRUCTIONS
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L1I miss rate = (ICACHE_L2_REFILLS + ICACHE_SYSTEM_REFILLS)/RETIRED_INSTRUCTIONS
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L1I miss ratio = (ICACHE_L2_REFILLS + ICACHE_SYSTEM_REFILLS)/ICACHE_FETCHES
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-
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This group measures the locality of your instruction code with regard to the
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L1 I-Cache.
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