mirror of
https://github.com/ClusterCockpit/cc-metric-collector.git
synced 2024-11-14 05:57:25 +01:00
36 lines
1.2 KiB
Plaintext
36 lines
1.2 KiB
Plaintext
|
SHORT L3 cache miss rate/ratio
|
||
|
|
|
||
|
|
EVENTSET
|
||
|
|
FIXC0 INSTR_RETIRED_ANY
|
||
|
|
FIXC1 CPU_CLK_UNHALTED_CORE
|
||
|
|
FIXC2 CPU_CLK_UNHALTED_REF
|
||
|
|
PMC0 MEM_LOAD_UOPS_RETIRED_L3_ALL
|
||
|
|
PMC1 MEM_LOAD_UOPS_RETIRED_L3_MISS
|
||
|
|
PMC2 UOPS_RETIRED_ALL
|
||
|
|
|
||
|
|
METRICS
|
||
|
|
Runtime (RDTSC) [s] time
|
||
|
|
Runtime unhalted [s] FIXC1*inverseClock
|
||
|
|
Clock [MHz] 1.E-06*(FIXC1/FIXC2)/inverseClock
|
||
|
|
CPI FIXC1/FIXC0
|
||
|
|
L3 request rate PMC0/PMC2
|
||
|
|
L3 miss rate PMC1/PMC2
|
||
|
|
L3 miss ratio PMC1/PMC0
|
||
|
|
|
||
|
|
LONG
|
||
|
|
Formulas:
|
||
|
|
L3 request rate = MEM_LOAD_UOPS_RETIRED_L3_ALL/UOPS_RETIRED_ALL
|
||
|
|
L3 miss rate = MEM_LOAD_UOPS_RETIRED_L3_MISS/UOPS_RETIRED_ALL
|
||
|
|
L3 miss ratio = MEM_LOAD_UOPS_RETIRED_L3_MISS/MEM_LOAD_UOPS_RETIRED_L3_ALL
|
||
|
|
-
|
||
|
|
This group measures the locality of your data accesses with regard to the
|
||
|
|
L3 cache. L3 request rate tells you how data intensive your code is
|
||
|
|
or how many data accesses you have on average per instruction.
|
||
|
|
The L3 miss rate gives a measure how often it was necessary to get
|
||
|
|
cache lines from memory. And finally L3 miss ratio tells you how many of your
|
||
|
|
memory references required a cache line to be loaded from a higher level.
|
||
|
|
While the# data cache miss rate might be given by your algorithm you should
|
||
|
|
try to get data cache miss ratio as low as possible by increasing your cache reuse.
|
||
|
|
|
||
|
|
|